Texas Instruments /TM4C1231H6PGE /ADC0 /CC

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Interpret as CC

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ADC_CC_CS_SYSPLL)ADC_CC_CS

ADC_CC_CS=ADC_CC_CS_SYSPLL

Description

ADC Clock Configuration

Fields

ADC_CC_CS

ADC Clock Source

0 (ADC_CC_CS_SYSPLL): Either the system clock (if the PLL bypass is in effect) or the 16 MHz clock derived from PLL / 25 (default)

1 (ADC_CC_CS_PIOSC): PIOSC

Links

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